Your nifty tool for development and repair. Useful for pll's, dds, almost anything 3-wire serial !
This tool was designed in collaboration with Uwe Kerwien from www.hobbyelektronik werkstatt.info.
It shall help when troubleshooting or repairing PLL circuits who demand for serial programming. This USB Adapter bridges the gap between your notebook
and the hardware on your surgical table :-)
Circuit
The circuit is straightforward. The UART - USB Adapter
(based on the MCP2200) in alliance with an Atmega 8 handle the communication. Two leds indicate the status. The interface can be used as a
Master (TALK) or as a Sniffer (LISTEN). On the left side, there are pins for clock, data and various enable signals. They have TTL level
and can be connected directly to your PLL-system. Series resistors are used to protect the Atmega. Even Pins for I2C are foreseen, the
current software version does not support it.
Firmware
The firmware was developped by Uwe Kerwien. The hex file for the Atmega 8 is available in the download section. Versions for
AT90S2313 or ATtiny2313 are available on Uwe's website. The bridge uses 9600,8,N,1. The Configuration of the MCP2200 can be seen
here.
Unfortunately Hyper Terminal is no longer part of Windows 7™ (and up). Ask Big G for an XP™ version of it.
Handling Short - Manual
After power-on or reset (connect pin 5 + 6 of isp), the device
outputs its status message. You are now able to enter a Command from the list below.
You may continue enter your data. Use the Backspace or the Esc key to edit. At the end, specify which enable
shall be used. A possible example may look like this :
If you now press Enter, you data will be send using the specified enable and all what you defined in the Setup.
In case the buffer is empty, the interface will display :
As the data remains in the RAM, you may press Enter several times to send the data multiple times.
In case there are more than one bit-rods in the buffer, pressing Enter will always send one, each time.
Monitor Mode Listen
After power-on the device is always in Monitor mode. All lines are configured as high-z inputs. The interface does
report :
This data is stored in the internal RAM as well as send via USB. If all data has been sent, internal memory will be cleared.
The maximum size of a bit-rod is 255 bits. (Internal memory : 96 bits). In case you want to keep the data of the internal buffer,
the Record functionality must be used. If you did so, you can use Store/Recall
to permanently save it in the Eeprom - and then in Master mode, send it again. In case you switched the Record
to on, the interface may prompt something like this :
Now you may store the contents in the Eeprom (Store). Or you may switch to Master mode and send it again.
The buffer may be deleted with Clear.
Read
According to your settings in the Setup, you may read a bitstream. You may cancel the action anytime with Esc.
The interface wants to know how many bits to be read and what enable it shall use. A possible example may look like this :
Record
The interface will (in Monitor mode) read and display everything what is going on at it's inputs. After it is transmitted via usb, the
data will be deleted. In case you pressed R, the bitstream will be kept in the memory to be stored permanently S or just to be retransmitted.
(Switch to Master). A possible example may look like this :
Clear
Deletes the content of the buffer. We know that you guessed that already. Just for completeness.
Store / Recall
This command (Store) is used to store a bitstream (which is in the RAM) in the Eeprom of the Atmega. Recall copies contents
from the Eeprom into the RAM. You may use Esc to cancel the action. The interface will go back into command mode, when done.
A possible example may look like this :
... it's still here ...
Enter
Calls the Send function. A bitstream in the buffer will be send. The interface
will reply with the transmitted sequence eg.: send 11100E2 or in case the buffer is empty with buffer empty !.
If there are more sequences in the buffer, each time you press Enter, one will be send.
+
Setup
Here you may set the polarity / length of the bitstream which will be send. Press S,C,E,L as often as you like. When finished,
press Enter or Esc. In case you pressed Enter, you may decide whether to
Store or simply to Use those settings. Below are two examples to make things clear.
ClockSET defines the value of the clock line when no programming occurs. ClockPOL defines if the data is read on the rising (0) or falling (1) edge. EnablePOL defines the polarity of the enable line when idle. EnableLEN defines the length of the enable signal. Latch-pulse or chipselect.
ClockSET=1, ClockPOL=0, EnablePOL=1, EnableLEN=1
ClockSET=1, ClockPOL=0, EnablePOL=0, EnableLEN=0
The above is mainly a translation of Uwe's manual. You mayst want to read the german original on his website.
(No, we do not compare traffic :-)
Example : Programming the AD9833
As the interface and its use with PLL's is detailed described on Uwe's website,
we show here, how to use it with a dds. We use an AD9833 here, driven by a clock of 16.777216 MHz.
"The analog output from the AD9833 is fMCLK / 228 X FREQREG" [Datasheet, p.15]. If we slightly rearrange this formula, we get
FREQREG = frequency x 16 . (Now you see, why we have chosen such a strange MCLK - it is 224. This makes life and spectrum nice :-)
So, we just have to multiply our desired frequency with 16 and convert it into binary form.
[e.g.] 1.0 MHz will result in 16'000'000 (Hz) equals 0b111101000010010000000000.
In order to get an 28 bit number, some zeros have to be inserted, as frequency registers are 28 bits wide. This number is then split
into two 14 bit numbers, which are programmed in two steps (three, if you also count the control word).
From the Datasheet [p.6], we know that "Data is clocked into the AD9833 on each falling edge of SCLK". Figure 4 (Serial Timing) on page 4 gives
information about the FSYNC (Enable) of the device. We can therefore determine our four control bits as follows :
ClockSET = 1
ClockPOL = 1
EnablePOL = 1
EnableLEN = 1
❶ Enable, ❷ Clock, ❸ Data.
Any resemblance to the last line in the picture above is purely coincidental on purpose.
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